Semiconductor device and method of fabricating the same
US11804530B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 30, 2021 |
| Grant date | Oct 31, 2023 |
| Priority date | — |
| Expiry date | Oct 9, 2041 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/85
- WIPO fieldMicro-structural and nano-technology
- WIPO sectorChemistry
Abstract
Disclosed are a semiconductor device and a method of fabricating the same. The device may include a substrate, an active pattern in an upper portion of the substrate and is extending in a first direction, a gate electrode crossing the active pattern and extending in a second direction intersecting the first direction, a first gate spacer covering a side surface of the gate electrode, a first inhibition layer between the gate electrode and the first gate spacer, and a gate insulating layer between the gate electrode and the active pattern. The gate insulating layer may include a high-k dielectric layer and a gate oxide layer. The gate oxide layer may be between the high-k dielectric layer and the active pattern. The high-k dielectric layer may be between the gate oxide layer and the gate electrode.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.