Integrated circuit with asymmetric access privileges
US11809334B2 · kind B2 · utility
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2References
21Claims
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Key dates
| Filing date | Apr 16, 2021 |
| Grant date | Nov 7, 2023 |
| Priority date | — |
| Expiry date | Apr 16, 2041 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/1052
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An integrated circuit comprises first and second interfaces, an internal addressable space comprising a plurality of address ranges, and a control unit. Each of the first and second interfaces is coupled to the internal addressable space via the control unit. The control unit is configurable in a first state in which the control unit is configured to allow or deny the second interface access to a subset of the plurality of address ranges of the internal addressable space.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.