Data bus, data processing method thereof, and data processing apparatus
US11809339B2 · kind B2 · utility
0Cited by
24References
19Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Mar 3, 2021 |
| Grant date | Nov 7, 2023 |
| Priority date | — |
| Expiry date | Mar 31, 2041 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F16/2379
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A data bus includes: a transaction selection circuit configured to receive vector data including a plurality of transactions from outside of the data bus, select at least one transaction from the plurality of transactions in which no traffic conflict occurs based on whether there is a traffic conflict among the plurality of transactions, and output the selected at least one transaction; and a memory data path including at least one register and configured to output the selected at least one transaction provided by the transaction selection circuit via the at least one register to the outside of the data bus.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.