Backplane and method for pulse width modulation
US11810509B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 14, 2022 |
| Grant date | Nov 7, 2023 |
| Priority date | — |
| Expiry date | Jul 14, 2042 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G2350/00
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A backplane for driving a display includes a two-dimensional array of pixel drive circuits, organized as a plurality of rows and a plurality of columns. The backplane has at least one shift register addressing assembly that includes a shift register chain formed of a plurality of controlling shift registers serially connected with, and separated by, equal sized groups of non-controlling shift registers. Each controlling shift register controls a different one of a plurality of word lines that each connect with pixel drive circuits of one row. The backplane also includes a plurality of bit lines that each connect with pixel drive circuits of one column. A shift register data sequence is input to a first one of the plurality of controlling shift registers and propagates through the shift register chain to control the plurality of word lines to load display values from the bit lines into the pixel drive circuits.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.