Solid-state memory with intelligent cell calibration
US11810625B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 12, 2021 |
| Grant date | Nov 7, 2023 |
| Priority date | — |
| Expiry date | Oct 12, 2041 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C16/0483
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A solid-state memory may have many non-individually erasable memory cells arranged into calibration groups with each memory cell in each respective calibration group using a common set of read voltages to sense programmed states. An evaluation circuit of the solid-state memory may be configured to measure at least one read parameter for each calibration group responsive to read operations carried out upon the memory cells in the associated calibration group. An adjustment circuit of the solid-state memory may redistribute the memory cells of an existing calibration group into at least one new calibration group in response to the at least one measured read parameter.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.