Thermal interface materials
US11811276B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 31, 2022 |
| Grant date | Nov 7, 2023 |
| Priority date | — |
| Expiry date | Aug 31, 2042 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH02M7/5387
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A power electronics converter includes a multi-layer planar carrier substrate, and a converter commutation cell including a power circuit. The power circuit includes at least one power semiconductor switching element, each of which is comprised in a power semiconductor prepackage. Each power semiconductor prepackage includes one or more power semiconductor switching elements embedded in a solid insulating material. A heat sink is arranged to remove heat from the respective power semiconductor prepackage. A thermal interface layer is arranged between a heat removal side of the respective power semiconductor prepackage and the heat sink. The thermal interface layer has a thermal conductivity and a mechanical compressibility. A converter parameter, which is defined as the mechanical compressibility of the thermal interface layer divided by the thermal conductivity of the thermal interface layer, satisfies 0.1 MNK/Wm<Ω<1 GNK/Wm.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.