Circuit module
US11812542B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 2, 2023 |
| Grant date | Nov 7, 2023 |
| Priority date | — |
| Expiry date | Feb 2, 2043 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/10158
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A circuit module 2 comprises: a wiring structure 4; at least one electronic component 6a, 6b arranged on the upper surface of the wiring structure 4; an insulating resin layer 8 which is provided on the upper surface of the wiring structure 4 and in which at least one electronic component 6a, 6b is embedded; and a metal layer 10 provided on the upper surface of the insulating resin layer 8. The surface roughness of the portion S1 directly above each electronic component on the upper surface of the insulating resin layer 8 is expressed as R1. The surface roughness of the portion S2 other than the portion directly above all the electronic components on the upper surface of the insulating resin layer 8 is expressed as R2. At least one R1 satisfies the condition: R1>R2.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.