Resistive memory devices
US11812619B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 12, 2021 |
| Grant date | Nov 7, 2023 |
| Priority date | — |
| Expiry date | Dec 17, 2041 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10N70/884
Abstract
A resistive memory device includes a first conductive line extending in a first horizontal direction on a substrate, a plurality of second conductive lines separated from the first conductive line in a vertical direction and extending in a second horizontal direction intersecting with the first horizontal direction, on the substrate, a plurality of memory cells respectively connected between the first conductive line and one second conductive line selected from among the plurality of second conductive lines at a plurality of intersection points between the first conductive line and the plurality of second conductive lines, each of the plurality of memory cells including a selection device and a resistive memory pattern, and a bottom electrode shared by the plurality of memory cells, the bottom electrode having a variable thickness in the first horizontal direction, and including a top surface having a concave-convex shape.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.