Clock frequency monitoring device and clock frequency monitoring method
US11815552B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 16, 2019 |
| Grant date | Nov 14, 2023 |
| Priority date | — |
| Expiry date | Nov 16, 2040 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04J3/0658
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
[Problem] To monitor a frequency difference between an input clock and a synchronous clock synchronized with the input clock.[Solution] A clock frequency monitoring apparatus that monitors the frequency of an input clock 18a includes a phase comparator 12 that compares a phase of a synchronous clock 18e phase-synchronized with the input clock 18a or a first frequency-divided clock 18f obtained by frequency-dividing the synchronous clock 18e with the phase of the input clock 18a, a filter 13 that low-pass filters an output signal of the phase comparator 12, an oscillator 14 that generates the synchronous clock 18e having a frequency corresponding to a control value from the filter 13, and a determiner 19 that determines that the frequency of the input clock 18a is abnormal when the variation amplitude of the output signal of the filter 13 is equal to or more than a predetermined range.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.