Room-temperature semiconductor maser and applications thereof
US11815588B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 6, 2020 |
| Grant date | Nov 14, 2023 |
| Priority date | — |
| Expiry date | Aug 31, 2042 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03F2200/72
- WIPO fieldOptics
- WIPO sectorInstruments
Abstract
A room-temperature semiconductor maser, including a first matching network, a second matching network, a heterojunction-containing transistor, and a resonant network. The output end of the first matching network is connected to the drain of the heterojunction-containing transistor. The input end of the second matching network is connected to the source of the heterojunction-containing transistor. The gate of the heterojunction-containing transistor is connected to the resonant network. The pumped microwaves are fed into the input end of the first matching network.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.