Identifying causes of anomalies observed in an integrated circuit chip
US11816016B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 26, 2020 |
| Grant date | Nov 14, 2023 |
| Priority date | — |
| Expiry date | Nov 26, 2040 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F11/3013
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method of identifying a cause of an anomalous feature measured from system circuitry on an integrated circuit (IC) chip, the IC chip comprising the system circuitry and monitoring circuitry for monitoring the system circuitry by measuring features of the system circuitry in each window of a series of windows, the method comprising: (i) from a set of windows prior to the anomalous window comprising the anomalous feature, identifying a candidate window set in which to search for the cause of the anomalous feature; (ii) for each of the measured features of the system circuitry: (a) calculating a first feature probability distribution of that measured feature for the candidate window set; (b) calculating a second feature probability distribution of that measured feature for window(s) not in the candidate window set; (c) comparing the first and second feature probability distributions; and (d) identifying that measured feature in the timeframe of the candidate window set as a cause of the anomalous feature if the first and second feature probability distributions differ by more than a threshold value; (iii) iterating steps (i) and (ii) for further candidate window sets from the set of…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.