Timing controller, display apparatus and display control method thereof
US11816291B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Jun 22, 2020 |
| Grant date | Nov 14, 2023 |
| Priority date | — |
| Expiry date | Aug 20, 2040 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10K59/8792
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A timing controller includes: a field programmable gate array configured to generate a reference clock signal, and obtain at least one group of clock signals according to the reference clock signal. Each group of clock signals includes at least two clock signals, and a waveform of each clock signal is same as a waveform of the reference clock signal, and active levels in different clock signals are provided with a delay of a preset duration. The reference clock signal includes a first clock sub-signal for first duration and a second clock sub-signal for a second duration. At least one output interface group is connected to the field programmable gate array. Each output interface group includes at least two output interfaces, and each of the at least two output interfaces is configured to output one clock signal of a group of clock signals corresponding to the output interface group.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.