Patent · US Active

Method for manufacturing shallow trench isolations

US11817344B2 · kind B2 · utility

0Cited by
1References
9Claims
0Family size

Assignee

Inventors

Key dates

Filing dateOct 4, 2021
Grant dateNov 14, 2023
Priority date
Expiry dateMay 7, 2042

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH01L21/32139
  • WIPO fieldSemiconductors
  • WIPO sectorElectrical engineering

Abstract

The disclosure provides a method for manufacturing shallow trench isolations, providing a substrate comprising a storage cell area and a peripheral area of a storage device; etching the upper part of the substrate of the storage cell area using a first etching process to form a first shallow trench, and filling the first shallow trench with silicon oxide using a first deposition process; and etching the upper part of the substrate of the peripheral area using a second etching process to form a second shallow trench, and filling the second shallow trench with silicon oxide using a second deposition process; wherein the depth and characteristic dimension of the first shallow trench are smaller than the depth and characteristic dimension of the second shallow trench. The disclosure can avoid the silicon dislocation defect of the peripheral area and ensure the device shape and characteristic dimension of the storage cell area.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.