Semiconductor device and method of fabricating the same
US11817405B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 7, 2021 |
| Grant date | Nov 14, 2023 |
| Priority date | — |
| Expiry date | Feb 23, 2042 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/181
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Disclosed are semiconductor devices and their fabricating methods. The semiconductor device comprises a dielectric layer, a trench formed in the dielectric layer, a metal pattern that conformally covers a top surface of the dielectric layer, an inner side surface of the trench, and a bottom surface of the trench, a first protection layer that conformally covers the metal pattern, and a second protection layer that covers the first protection layer. A cavity is formed in the trench. The cavity is surrounded by the first protection layer. The first protection layer has an opening that penetrates the first protection layer and extends from a top surface of the first protection layer. The opening is connected to the cavity. A portion of the second protection layer extends into the opening and closes the cavity.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.