Thin film transistor and method for manufacturing the same, array substrate, and display device
US11817460B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 27, 2020 |
| Grant date | Nov 14, 2023 |
| Priority date | — |
| Expiry date | Jun 8, 2040 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D86/431
Abstract
A thin film transistor includes a gate, a gate insulating layer, an active layer, an ionized amorphous silicon layer, a source and a drain. The gate insulating layer covers the gate. The active layer is disposed on a side of the gate insulating layer away from the gate. The ionized amorphous silicon layer is disposed on a side of the active layer away from the gate, and the ionized amorphous silicon layer is in contact with the gate insulating layer. The source and the drain are disposed on a side of the ionized amorphous silicon layer away from the gate insulating layer, and the source and the drain are coupled to the active layer through the ionized amorphous silicon layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.