Generation of code coverage information during testing of a code sequence
US11822462B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 5, 2019 |
| Grant date | Nov 21, 2023 |
| Priority date | — |
| Expiry date | Sep 26, 2039 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F11/3636
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method and computer program for generating code coverage information during testing of a code sequence are described, in which the code sequence comprises decisions, each having one or more conditions as inputs. The method includes executing the code sequence on target processing circuitry under the control of test stimuli and maintaining, in memory, a code coverage table for at least one decision. When a decision is evaluated, a bitstring is created within a storage element, each position in the bitstring being associated with one of the conditions and the value in that position representing the value of that condition used in evaluating the decision. The bitstring is used to identify the entry, in the code coverage table associated with the evaluated decision, for that combination of values of the conditions, and a confirmation value is recorded in that entry, indicating that the decision has been evaluated for that entry.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.