Antenna effect protection and electrostatic discharge protection for three-dimensional integrated circuit
US11824254B2 · kind B2 · utility
1Cited by
2References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jul 27, 2022 |
| Grant date | Nov 21, 2023 |
| Priority date | — |
| Expiry date | Jul 27, 2042 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2225/06541
- WIPO fieldTelecommunications
- WIPO sectorElectrical engineering
Abstract
A 3D IC package is provided. The 3D IC package includes: a first IC die comprising a first substrate at a back side of the first IC die; a second IC die stacked at the back side of the first IC die and facing the first substrate; a TSV through the first substrate and electrically connecting the first IC die and the second IC die, the TSV having a TSV cell including a TSV cell boundary surrounding the TSV; and a protection module fabricated in the first substrate, wherein the protection module is electrically connected to the TSV, and the protection module is within the TSV cell.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.