Scheduling analog-to-digital conversions
US11824550B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 30, 2021 |
| Grant date | Nov 21, 2023 |
| Priority date | — |
| Expiry date | Jan 22, 2042 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M1/1245
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A method is provided. In some examples, the method includes receiving, at a sequencer circuit of an analog-to-digital converter (ADC), a first request to perform a first conversion. In addition, the method includes determining, by the sequencer circuit, that the ADC is not busy. The method further includes responsive to determining that the ADC is not busy, and by the sequencer circuit, causing the ADC to perform the first conversion. The method also includes receiving, at the sequencer circuit, a second request to perform a second conversion. The method includes determining, by the sequencer circuit, that the ADC is busy and, responsive to determining that the ADC is busy, and by the sequencer circuit, waiting to cause the ADC to perform the second conversion.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.