Impedance measurement circuit architecture
US11826577B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 25, 2021 |
| Grant date | Nov 28, 2023 |
| Priority date | — |
| Expiry date | Oct 22, 2041 |
Classification
- Technology area (CPC A)Human Necessities
- CPC primaryA61N2001/083
- WIPO fieldMedical technology
- WIPO sectorInstruments
Abstract
A lead impedance stimulation architecture and a dual current source and sink methodology to output a biphasic current pulse and measure a resulting induced voltage across the stimulation electrodes to determine lead impedance. A common mode capacitance on the electrode interface may have little impact on the stimulation architecture of this disclosure allowing for fast voltage rise time and consistent and accurate impedance measurement. In addition, the dual source and sink includes a monitor circuit on each of the source and the sink circuitry. In the event of an open circuit indicating a lead breakage, loose connection, lead migration, insulation leak, and so on, the monitor circuit may provide an output to indicate specifically which electrode is unable to reach the correct current stimulation amplitude. In this manner the techniques of this disclosure, may also detect a lead break in a single lead impedance measurement.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.