Method for managing the debugging of a system on chip forming for example a microcontroller, and corresponding system on chip
US11829188B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Nov 20, 2020 |
| Grant date | Nov 28, 2023 |
| Priority date | — |
| Expiry date | Feb 5, 2042 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2213/0038
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
In an embodiment a system on chip includes a plurality of microprocessors, a plurality of slave resources, an interconnection circuit coupled between the microprocessors and the slave resources, the interconnection circuit configured to route transactions between the microprocessors and the slave resources and a processing controller configured to allow a user of the system to implement within the system at least one configuration diagram of the system defined by a set of configuration pieces of information used to define an assignment of at least one microprocessor to at least some of the slave resources, select the at least one microprocessors, and authorise an external debugging tool to access, for debugging purposes, only the slave resources assigned to the at least one microprocessor.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.