General-purpose systolic array
US11829321B2 · kind B2 · utility
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21Claims
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Key dates
| Filing date | Mar 24, 2022 |
| Grant date | Nov 28, 2023 |
| Priority date | — |
| Expiry date | Mar 24, 2042 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F15/17381
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A systolic array cell is described, the cell including two general-purpose arithmetic logic units (ALUs) and register-file. A plurality of the cells may be configured in a matrix or array, such that the output of the first ALU in a first cell is provided to a second cell to the right of the first cell, and the output of the second ALU in the first cell is provided to a third cell below the first cell. The two ALUs in each cell of the array allow for processing of a different instruction in each cycle.
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