Semiconductor apparatus
US11830902B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 14, 2021 |
| Grant date | Nov 28, 2023 |
| Priority date | — |
| Expiry date | Nov 19, 2041 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10F39/803
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A semiconductor apparatus including: a first substrate; a first wiring structure; a second substrate; and a second wiring structure, wherein the first wiring structure has a first wiring layer bonded to wiring of the second wiring structure, a second wiring layer connected to the first wiring layer by a first via, and a third wiring layer connected to the second wiring layer by a second via, at least part of the second via is located at a range distanced, by at least a width of the first via, from an axis of the first via, a thickness of the second wiring layer is less than the width of the first via, a major constituent of the first wiring layer, the second wiring layer and the first via is copper, and a layer that is made from a material different from copper is disposed between the first via and the second wiring layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.