Power semiconductor device and method of fabricating the same
US11830914B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 24, 2021 |
| Grant date | Nov 28, 2023 |
| Priority date | — |
| Expiry date | May 24, 2041 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/146
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A power semiconductor device includes a semiconductor layer of SiC, a gate insulating layer, a gate electrode layer, a drift region including at least one protruding portion in the semiconductor layer and having a first conductivity type, a well region including a first well region in the semiconductor layer and in contact with the protruding portion, and a second well region in the semiconductor layer outside the gate electrode layer and connected to the first well region, and having a second conductivity type, a source region including a first source region in the first well region and a second source region in the second well region and connected to the first source region, and having the first conductivity type, and a channel region under the gate electrode layer, in the semiconductor layer between the protruding portion and the first source region, and having the first conductivity type.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.