Semiconductor device structure with metal gate stacks
US11830926B2 · kind B2 · utility
1Cited by
16References
20Claims
0Family size
Assignee
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Key dates
| Filing date | Dec 10, 2021 |
| Grant date | Nov 28, 2023 |
| Priority date | — |
| Expiry date | Dec 10, 2041 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D86/215
Abstract
A semiconductor device structure is provided. The semiconductor device structure includes a semiconductor substrate and a first metal gate stack and a second metal gate stack over the semiconductor substrate. The first metal gate stack and the second metal gate stack are electrically isolated from each other, and the first metal gate stack has a curved edge facing the second metal gate stack. The semiconductor device structure also includes a dielectric layer surrounding the first metal gate stack and the second metal gate stack.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.