Method for structuring an insulating layer on a semiconductor wafer

US11830962B2 · kind B2 · utility

Assignee

• Azur Space Solar Power GmbH · DE

Inventors

• Alexander Frey · Lappersdorf, DE
• Benjamin HAGEDORN · Weinsberg, DE

Key dates

• Filing date: Feb 9, 2022
• Grant date: Nov 28, 2023
• Expiry date: Feb 9, 2042

Classification

• Technology area (CPC Y): Emerging Cross-Sectional Technologies
• CPC primary: Y02E10/544

Abstract

A method for structuring an insulating layer on a semiconductor wafer, at least comprising the steps of: Provision of a semiconductor wafer with a top, a bottom and comprising multiple solar cell stacks, wherein each solar cell stack is a Ge substrate, which forms the bottom of the semiconductor wafer, a Ge subcell and at least two III-V subcells, in the above order, and at least one passage opening, which extends from the top to the bottom of the semiconductor wafer and has a connected side wall, an insulating layer two-dimensionally deposited on the top of the semiconductor wafer, on the side wall of the passage opening and/or on the bottom of the semiconductor wafer, and the deposition of an etch-resistant filling material by means of a printing process on an area of the top which comprises the passage opening, and into the passage opening.