Device and method of configurable synchronization signal and channel design
US11831479B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 12, 2020 |
| Grant date | Nov 28, 2023 |
| Priority date | — |
| Expiry date | Oct 9, 2041 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04W72/23
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
Devices and methods of using xSS are generally disclosed. A UE receives an xPSS with (Nrep) symbols each with a subcarrier spacing of K×a PSS subcarrier spacing and a duration of a PSS symbol/K. PSD subcarriers surround the xPSS and the ZC sequence is punctured to avoid transmission on a DC subcarrier. Guard subcarriers separate the xPSS and PSD when the ZC sequence is less than the occupied BW of the xPSS and at least one element in the ZC sequence is punctured for xPSS symbol generation otherwise. One or more xSSSs and xS-SCHs may follow the xPSS. The xSS may be omnidirectional, each having a same xPSS and different xSSS or xS-SCH or a different xPSS and same xSSS or xS-SCH or beamformed, each having different xPSSs and xSSSs or xS-SCHs or a same xPSS and different xSSS or xS-SCH.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.