Integrated circuits for neurotechnology and other applications
US11833346B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 8, 2021 |
| Grant date | Dec 5, 2023 |
| Priority date | — |
| Expiry date | Jul 9, 2041 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/14
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
The present invention generally relates to nanowires. In one aspect, the present invention is generally directed to systems and methods of individually addressing nanowires on a surface, e.g., that are substantially upstanding or vertically-oriented with respect to the surface. In some cases, one or more nanowires may be individually addressed using various integrated circuit (“IC”) technologies, such as CMOS. For example, the nanowires may form an array on top of an active CMOs integrated circuit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.