Accelerator controller for inserting template microcode instructions into a microcode buffer to accelerate matrix operations
US11836488B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 13, 2020 |
| Grant date | Dec 5, 2023 |
| Priority date | — |
| Expiry date | Jan 13, 2040 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F17/16
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method for a controller to execute a program comprising a sequence of functions on an accelerator with a pipelined architecture comprising a microcode buffer. The method comprises executing a function of the program as a sequence of operations, wherein the sequence of operations is represented by a sequence of templates, determining whether the template is non-colliding with previously inserted templates in the microcode buffer, determining whether data in local memory will be referenced before all previously inserted templates have taken effect, determining whether registers will be referenced before all previously inserted templates in the microcode buffer have taken effect, when it is determined that the template fits, that resources are available, that local data memory accesses will not collide, and that register accesses will not collide: creating a sequence of microcode instructions in the template, and inserting the template into the microcode buffer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.