Array substrate and display panel
US11837608B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 6, 2022 |
| Grant date | Dec 5, 2023 |
| Priority date | — |
| Expiry date | Apr 30, 2042 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G2330/12
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
An array substrate and a display panel. The array substrate includes: a substrate having a display region and a non-display region surrounding the display region. The non-display region includes a first sub-region extending in a first direction, a second sub-region extending in a second direction, and a third sub-region connecting the first sub-region with the second sub-region, and the third sub-region extends in an arc shape, and the first sub-region comprises a binding region; a plurality of signal lines extending in the display region; a plurality of circuit modules located on the substrate; and a plurality of fan-out lines located in the non-display region. Each of the fan-out lines is electrically connected to a corresponding one of the circuit modules and extends to the binding region.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.