Half via hole structure, manufacturing method thereof, array substrate, and display panel

US11843005B2 · kind B2 · utility

Assignees

• Chongqing BOE Optoelectronics Technology Co., Ltd. · CN
• BOE Technology Group Co., Ltd. · CN

Inventors

• Zhiyong NING · Beijing, CN
• Zhonghao Huang · Beijing, CN
• Chao Zhang · Nanhu, CN
• Zhaojun Wang · Beijing, CN
• Hongru Zhou · Beijing, CN
• Yutong Yang · Beijing, CN
• Rui Wang · Beijing, CN
• Xu Wu · Beijing, CN
• Kunkun GAO · Beijing, CN

Key dates

• Filing date: Feb 1, 2021
• Grant date: Dec 12, 2023
• Expiry date: Aug 1, 2041

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D86/451

Abstract

A half via hole structure, a method for manufacturing the same, an array substrate, and a display panel are provided. The half via hole structure includes: a spacer layer arranged on an underlaying substrate; a passivation layer arranged on the spacer layer and provided with a first via hole, an orthographic projection of the first via hole on the underlaying substrate being within that of the spacer layer on the underlaying substrate; a first conductive layer arranged on the spacer layer and having a width smaller than a diameter of the first via hole; an insulating layer arranged between the spacer layer and the passivation layer and provided with a second via hole; and a second conductive layer arranged on the passivation layer and overlapped with the first conductive layer through the first via hole.