Array substrate, display panel, and display apparatus
US11848336B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Sep 3, 2021 |
| Grant date | Dec 19, 2023 |
| Priority date | — |
| Expiry date | Dec 17, 2041 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D86/471
Abstract
An array substrate, a display panel, and a display apparatus are provided. The array substrate includes a substrate and a first thin-film transistor located on the substrate. In an embodiment, the first thin-film transistor includes a channel and a gate electrode. In an embodiment, an orthographic projection of the gate electrode on the substrate overlaps with an orthographic projection of the channel on the substrate. In an embodiment, the gate electrode comprises a first zone and a second zone that are arranged in a first direction. In an embodiment, the channel overlapping with the first zone in a direction perpendicular to the substrate has a total width W1 in a second direction perpendicular to the first direction, the channel overlapping with the second zone in a direction perpendicular to the substrate has a total width W2 in the second direction, and W1/W2≤3.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.