Time synchronization using model correction
US11849016B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | May 13, 2021 |
| Grant date | Dec 19, 2023 |
| Priority date | — |
| Expiry date | May 27, 2041 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L43/106
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
Techniques are disclosed for performing time synchronization at a plurality of computing devices in a network. In one example, a method comprising obtaining timestamp data in accordance with a synchronization operation for a timing protocol; computing a skewness estimate and an offset estimate from the timestamp data by executing a regression analysis, wherein the regression analysis is configured to train a first model to predict the offset estimate and the skewness estimate, the offset estimate comprising a clock time difference between the first clock and the second clock; computing a corrected skewness estimate and a corrected offset estimate based on a second model having parameters based on the offset estimate and the skewness estimate; and modifying a current time value of at least one of the first clock or the second clock based on at least one of the corrected offset estimate or the corrected skewness estimate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.