Clock error-bound tracker
US11853116B2 · kind B2 · utility
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21Claims
0Family size
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Key dates
| Filing date | Jan 24, 2022 |
| Grant date | Dec 26, 2023 |
| Priority date | — |
| Expiry date | Jun 10, 2042 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04J3/0697
- WIPO fieldTelecommunications
- WIPO sectorElectrical engineering
Abstract
In one embodiment, a device includes a hardware clock to maintain a clock value, a hardware counter to maintain an estimation of a dynamic error bound of the clock value, and a clock controller to intermittently discipline the hardware clock responsively to a remote clock, advance the hardware counter at a rate responsively to a clock drift, and adjust the hardware counter responsively to the hardware clock being disciplined.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.