Implementation of a neural network in multicore hardware
US11853866B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 13, 2021 |
| Grant date | Dec 26, 2023 |
| Priority date | — |
| Expiry date | May 21, 2042 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C11/54
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A multicore hardware implementation of a deep neural network includes a plurality of layers arranged in plurality of layer groups. The input data to the network comprises a multidimensional tensor including one or more traversed dimensions, being dimensions that are traversed by strides in at least one layer of a first layer group. The hardware implementation is configured to split the input data for the first layer group into at least a first tile and a second tile, along at least one of the traversed dimensions, each tile comprising a plurality of data elements in each of the one or more traversed dimensions. A first core is configured to evaluate multiple layer groups, depth-first, based on the first tile. A second core is configured to evaluate multiple layer groups, depth-first, based on the second tile.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.