Patent · US Active

Reducing latency in augmented reality (AR) displays

US11854511B2 · kind B2 · utility

0Cited by
5References
19Claims
0Family size

Assignee

Inventors

Key dates

Filing dateJul 13, 2022
Grant dateDec 26, 2023
Priority date
Expiry dateJul 13, 2042

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG09G2360/18
  • WIPO fieldAudio-visual technology
  • WIPO sectorElectrical engineering

Abstract

Disclosed are systems, methods, and non-transitory computer-readable media for reducing latency in augmented reality displays. A display controller receives, from a GPU, a stream of image pixels of a frame of virtual content to be presented on a display of a display device. The stream of image pixels is received via a high-speed bulk interface that transfers data at least as fast as can be consumed by the display. As the stream of image pixel is received, the display controller converts each respective image pixel from a data format used to transmit the stream of image pixels via the high-speed bulk interface to a data format that is compatible for display by the display. Each converted image pixel is stored in a pixel cell of the display, after which the frame is presented on the display.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.