System and method for coordinating use of multiple coprocessors
US11860737B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 16, 2019 |
| Grant date | Jan 2, 2024 |
| Priority date | — |
| Expiry date | Mar 16, 2039 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F11/3433
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An interface software layer is interposed between at least one application and a plurality of coprocessors. A data and command stream issued by the application(s) to an API of an intended one of the coprocessors is intercepted by the layer, which also acquires and stores the execution state information for the intended coprocessor at a coprocessor synchronization boundary. At least a portion of the intercepted data and command stream data is stored in a replay log associated with the intended coprocessor. The replay log associated with the intended coprocessor is then read out, along with the stored execution state information, and is submitted to and serviced by at least one different one of the coprocessors other than the intended coprocessor.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.