Placement method and non-transitory computer readable storage medium
US11861283B2 · kind B2 · utility
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4References
9Claims
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Key dates
| Filing date | Nov 15, 2021 |
| Grant date | Jan 2, 2024 |
| Priority date | — |
| Expiry date | Aug 25, 2042 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F30/3947
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A placement method for integrated circuit design is provided. Each net is considered as a soft module. The net will receive a larger penalty if it covers more routing congested regions. Therefore, it is easier to move the nets away from routing congested regions. In addition, to relieve local congestion, a novel inflation method is proposed to expand the area of a cluster according to its internal connectivity intensity and routing congestion occupied by the cluster. Accordingly, it can get better routability and wirelength.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.