Shift register and driving method therefor, gate driver circuit, and display apparatus
US11862216B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Oct 27, 2021 |
| Grant date | Jan 2, 2024 |
| Priority date | — |
| Expiry date | Oct 27, 2041 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G2310/08
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A shift register, comprising an input circuit, a first control circuit, a second control circuit and an output circuit. The input circuit is configured to transmit a first voltage signal from a first voltage signal terminal to a first node under the control of an input signal from a signal input terminal. The first control circuit is configured to transmit a second voltage signal from a second voltage signal terminal to a second node under the control of a first clock signal from a first clock signal terminal and the voltage of the first node. The second control circuit is configured to transmit a second clock signal from a second clock signal terminal to a third node under the control of the voltage of the second node. The output circuit is configured to transmit the first voltage signal from the first voltage signal terminal to a scan signal output terminal under the control of the voltage of the third node.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.