Multi-layered spacer and double-sided cooling power module including same
US11862530B2 · kind B2 · utility
1Cited by
2References
5Claims
0Family size
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Key dates
| Filing date | Sep 24, 2020 |
| Grant date | Jan 2, 2024 |
| Priority date | — |
| Expiry date | Sep 24, 2040 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/181
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A multi-layered spacer of which a thermal expansion coefficient and a thermal conductivity are controllable and a double-sided cooling power module including the multi-layered spacer, is provided between a semiconductor chip and a substrate in a double-sided cooling power module. The multi-spacer includes first metal layers made of a first metal and provided as at least respective outermost layers, and a second metal layer made of a second metal having a thermal expansion coefficient lower than a thermal expansion coefficient of the first metal and disposed between the first metal layers provided as the outermost layers.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.