Method for manufacturing buried gate and method for manufacturing semiconductor device
US11862697B2 · kind B2 · utility
0Cited by
8References
20Claims
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Key dates
| Filing date | Jul 9, 2021 |
| Grant date | Jan 2, 2024 |
| Priority date | — |
| Expiry date | Mar 18, 2042 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/01
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method for manufacturing a buried gate and a method for manufacturing a semiconductor device are disclosed. The method for manufacturing the buried gate includes that: a trench is provided on an active region of a substrate; a gate structure is filled in a bottom of the trench, and a trench sidewall above the gate structure is exposed; an epitaxial layer is grown on the exposed trench sidewall with an epitaxial growth process, in which the epitaxial layer does not close the trench; and an isolation layer is filled in the trench.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.