Flip-flop circuit including control signal generation circuit
US11863188B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 17, 2022 |
| Grant date | Jan 2, 2024 |
| Priority date | — |
| Expiry date | Jun 17, 2042 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/20
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A flip-flop circuit includes a first master latch circuit transmitting an inverted signal of an input signal received from an external device to a first node and transmitting an inverted signal of a signal of the first node to a second node, according to a first control signal having a first logic level or a second control signal having a second logic level, a first slave latch circuit transmitting an inverted signal of a signal of the second node to a third node according to the first control signal having the second logic level or the second control signal having the first logic level, a first output inverter generating a first output signal by inverting a signal of the third node, and a first control signal generation circuit generating the first control signal and the second control signal based on a clock signal and the signal of the first node.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.