Differential circuitry
US11863199B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Oct 4, 2022 |
| Grant date | Jan 2, 2024 |
| Priority date | — |
| Expiry date | Oct 4, 2042 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M1/78
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
Differential circuitry including first and second current paths each including a succession of first and further load nodes, each successive further load node connected to its preceding load node via a divider impedance; and first switching circuitry connected to the further load node or nodes of the first current path, and second switching circuitry connected to the further load node or nodes of the second current path, the first and second switching circuitry controlling a magnitude of controllable current signals passing through the load nodes of the first current path and the second current path, respectively, wherein: the first load nodes of the first and second current paths include a first pair of load nodes, and the or each successive further load node of the first current path and its corresponding successive further load node of the second current path include a successive further pair of load nodes.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.