Method for manufacturing semiconductor structure with core and peripheral regions and semiconductor structure thereof
US11864373B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 20, 2022 |
| Grant date | Jan 2, 2024 |
| Priority date | — |
| Expiry date | Mar 13, 2042 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B12/485
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method for manufacturing a semiconductor structure and a semiconductor structure are provided. The method includes the following operations. A substrate is provided, includes a core region and a peripheral region. A preset barrier layer is formed on the substrate, and covers the core region and the peripheral region. At least a part of the preset barrier layer corresponding to the peripheral region is removed to expose a part of the substrate, and to take a reserved part of the preset barrier layer as a first barrier layer. A dielectric layer and a first conductive layer are successively formed on the first barrier layer and the substrate. A part of the dielectric layer and the first conductive layer on the first barrier layer are removed, to reserve a part of the dielectric layer and the first conductive layer on the first barrier layer closer to the peripheral region.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.