Method and system for full cycle error correction of inductor current measurement for switching regulators
US11867788B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Jan 22, 2021 |
| Grant date | Jan 9, 2024 |
| Priority date | — |
| Expiry date | Mar 29, 2041 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH02M1/0025
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
Example implementations include a method of generating a ramp down compensation voltage based at least partially on the a current sense voltage and an inductor voltage of an inductor at an inductor node, applying the ramp down compensation voltage to the inductor node, and in accordance with a first determination that the valley current sense voltage and the inductor voltage are not equal, modifying a predetermined capacitance of a system capacitor operatively coupled to the inductor node to a first modified capacitance. Example implementations also include an apparatus with a ramp-down compensator operable to generate a ramp down compensation voltage based at least partially on the a current sense voltage and an inductor voltage of an inductor at an inductor node, and to apply the ramp down compensation voltage to the inductor node, and a ramp-up compensator including a system capacitor operatively coupled to the inductor node, operatively coupled to the ramp-down compensator, and operable to, in accordance with a first determination that the valley current sense voltage and the inductor voltage are not equal, modify a predetermined capacitance of the system capacitor to a first m…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.