Memory validation
US11868286B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 7, 2022 |
| Grant date | Jan 9, 2024 |
| Priority date | — |
| Expiry date | Oct 7, 2042 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/7209
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
One example method of testing an electrical device comprises transmitting a data pattern to a memory device of the electrical device by a controller of the electrical device to provide a written data pattern to the memory device, wherein the data pattern replicates a resonant frequency of at least a portion of the electrical device, reading the written data pattern from the memory device with the controller, and comparing the written data pattern to the data pattern.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.