Non-volatile memory device and method of incrementally programming the same using a plurality of program loops
US11869582B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 26, 2021 |
| Grant date | Jan 9, 2024 |
| Priority date | — |
| Expiry date | Mar 23, 2042 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/14511
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method of operating a memory device that performs a plurality of program loops for a plurality of memory cells includes applying a first program pulse and a first verify pulse of a first program loop from among the plurality of program loops, counting a first off cell count by using an output based on the first verify pulse, determining a first verify skip period using the first off cell count, applying an N-th program pulse and a plurality of verify pulses in response to an end of the first verify skip period, counting a second off cell count by using an output based on the plurality of verify pulses, and determining a second verify skip period using the second off cell count.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.