System and method for pulsed gate control of a transistor
US11870428B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 26, 2022 |
| Grant date | Jan 9, 2024 |
| Priority date | — |
| Expiry date | Aug 26, 2042 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K17/166
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A method of controlling current through a transistor is provided. A voltage and current through the transistor are measured. A safe operating current for the voltage is determined. For each of a first sequence of current pulses, a voltage of a voltage pulse applied to a control node of the transistor using a feedback controller is adjusted until the current measured through the transistor is not greater than a first function of the safe operating current. For each of a second sequence of current pulses after the first sequence of current pulses, the voltage of the voltage pulse applied to the control node of the transistor using the feedback controller is adjusted until the current measured through the transistor is not greater than a second function of the safe operating current.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.