Display device
US11871624B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 2, 2020 |
| Grant date | Jan 9, 2024 |
| Priority date | — |
| Expiry date | Sep 7, 2041 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G2300/0861
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A display device includes a first semiconductor layer disposed on a substrate; a first insulating layer disposed on the first semiconductor layer; a scan line disposed on the first insulating layer; a second insulating layer on the scan line; an inverted scan line on the second insulating layer; a third insulating layer disposed on the inverted scan line; a second semiconductor layer disposed on the third insulating layer; a fourth insulating layer disposed on the second semiconductor layer; an initializing voltage line disposed on the fourth insulating layer and overlapping the scan line; a first transistor including a channel disposed in the first semiconductor layer and receiving a gate signal through the scan line; and a second transistor including a channel disposed in the second semiconductor layer and receiving a gate signal through the inverted scan line.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.