Electronic device and method for managing memory using the same
US11875035B2 · kind B2 · utility
0Cited by
4References
20Claims
0Family size
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Key dates
| Filing date | Dec 30, 2021 |
| Grant date | Jan 16, 2024 |
| Priority date | — |
| Expiry date | May 11, 2042 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F8/62
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
According to certain embodiments, an electronic device comprises: a memory; and a processor operatively coupled to the memory, wherein the processor is configured to: identify a remaining capacity of the memory, and when the remaining capacity of the memory is less than a specified ratio of a total capacity of the memory, block compilation using a profile of an application, or delete an artifact created through compilation using the profile of the application.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.