Printed circuit board
US11877397B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | May 15, 2020 |
| Grant date | Jan 16, 2024 |
| Priority date | — |
| Expiry date | Feb 25, 2041 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH05K2201/09509
- WIPO fieldSurface technology, coating
- WIPO sectorChemistry
Abstract
The printed circuit board includes, a first conductive layer including copper foil, an insulating base layer, and a second conductive layer including copper foil in this order, and includes a via-hole laminate that is stacked on an inner circumference and a bottom of a connection hole extending through the first conductive layer and the base layer in a thickness direction. The via-hole laminate has an electroless copper plating layer stacked on the connection hole and an electrolytic copper plating layer stacked on the electroless copper plating layer. The copper foil has copper crystal grains oriented in a (100) plane orientation, and an average crystal grain size of copper of 10 μm or more. The electroless copper plating layer includes palladium and tin, and an amount of the palladium stacked per unit area of a surface of the copper foil is 0.18 μg/cm2 or more and 0.40 μg/cm2 or less.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.